Welcome to this website, which reflects my work as Postdoc at the Electronic Systems group of the Department of Electrical Engineering of Eindhoven University of Technology. Although I am no longer with the Eindhoven University of Technology, I am still interested in the folowing three research areas.

Design Methods

• System-level design with the Software/Hardware Engineering (SHE) method
  SHE is a UML-based system-level design method for hardware/software systems. My contributions are on the development of performance models with the modelling langauges UML and POOSL and the actual exploration of design alternatives.
• A design method for Network-on-Chip (NoC) based Multi Processor Systems-on-Chip (MPSoC)
  NoC-based MPSoCs, which replace classic bus-based processor platforms, seem favourable for future multi-media systems because of their flexibility and scalability. My focus is on a method for efficiently mapping multi-media applications on NoC-based MPSoCs taking requirements on quality, performance and energy into account.

Performance Analysis

• Markov chain-based performance analysis techniques
  Markov chains are a suitable mathematical structure for both analytical computation and simulation-based estimation of long-run average performance metrics. My contributions are on the development of both analytical and simulation-based techniques to evaluate common forms of extrema, reahability and long-run performance metrics for complex systems.
• Performance analysis techniques for Synchronous Data Flows (SDF), Boolean Data Flows (BDF), Scenario-Aware Data Flow (SADF), Kahn Process Networks (KPN) and Reactive Process Networks (RPN)
  SDFs, BDFs, SADFs, KPNs and RPNs are mathematical structures for specifying and analysing streaming multi-media applications. My focus is on the development of techniques for computing or approximating common performance metrics for such systems analytically and/or by means of simulation-based performance analysis techniques.

Quality and Resource Management

• Quality and Resource manangement for Network-on-Chip (NoC) based Multi Processor Systems-on-Chip (MPSoC)
  On-chip resource management is concerned with ensuring that all applications mapped on a MPSoC get sufficient processor, communication and storage resources to ensure satisfying their quality, performance and energy requirements. My focus is on the development of approaches to perform trade-offs between perceived quality and resource usage based on design-time and run-time considerations.