Publications

This is the chronological list of publications of Lech Jozwiak

[103] A. Chojnacki, L. Józwiak: High-quality FPGA Designs through Functional Decomposition with Sub-function Input Support Selection Based on Information Relationship Measures, IEEE International Symposium on Quality of Electronic Design, March 26-28, 2001, San Jose, California, USA, ISBN 0-7695-1025-6, IEEE Computer Society Press, Los Alamitos, CA, USA, pp. 409 - 414.

[102] L. Józwiak, A. Chojnacki: High-quality Sub-function Construction in Functional Decomposition Based on Information Relationship Measures, DATE'2001 - Design, Automation, and Test in Europe Conference, Munich, Germany, 13-16 March, 2001, ISBN 0-7695-0993-2, IEEE Computer Society Press, Los Alamitos, CA, USA, 2000, pp. 383-390.

[101] L. Józwiak: Modern methods and Tools in Digital System Design, Journal of Systems Architecture, April 2001, ISSN 1383-7621/01165-6074, Elsevier Science, Amsterdam, The Netherlands, 2001, Vol 47/3-4, pp. 197-200.

[100] L. Józwiak: Quality-driven Design in the System-on-a-Chip Era: Why and How?, Journal of Systems Architecture, April 2001, ISSN 1383-7621/01165-6074, Elsevier Science, Amsterdam, The Netherlands, 2001, Vol 47/3-4, pp 201-224.

[99] M. Rawski, L. Józwiak, T, Luba: Functional Decomposition with an Efficient Input Support Selection for Sub-functions Based on Information Relationship Measures, Journal of Systems Architecture, ISSN 1383-7621/01165-6074, Elsevier Science, Amsterdam, The Netherlands, 2001, Vol 47/2, pp 137-155.

[98] L. Józwiak, A. Slusarczyk, M. Perkowski: Term Trees in Application to an Effective and Efficient ATPG for AND-EXOR and AND-OR Circuits, VLSI Design: An International Journal of Custom Chip Design Simulation and Testing (accepted for publication).

[97] L. Józwiak, A. Slusarczyk: A New State Assignment Method Targeting FPGA Implementations, EUROMICRO Symposium on Digital System Design DSD2000, Maastricht, the Netherlands, September 5-7, 2000, ISBN 0-7695-0780-8, IEEE Computer Society Press, Los Alamitos, CA, USA, 2000, pp.50-59.

[96] L. Józwiak, A. Slusarczyk: Application of Information Relationships and Measures to Decomposition and Encoding of Incompletely Specified Sequential Machines, Third Oregon Symposium of Logic, Design and Learning, Oregon, Portland, USA, May 22, 2000.

[95] L. Józwiak: Quality-Driven System-on-a-Chip Design, IEEE International Symposium on Quality of Electronic Design, March 20-22, 2000, San Jose, California, USA, ISBN 0-7695-0525-2, IEEE Computer Society Press, Los Alamitos, CA, USA, 2000, pp. 93-102.

[94] A. Chojnacki, L. Józwiak: Multi-valued Sub-function Encoding in Functional Decomposition Based on Information Relationships Measures, IEEE International Symposium on Multiple-Valued Logic - ISMVL'2000, Portland, Oregon, USA, May 23-25, 2000, IEEE Computer Society Press, Los Alamitos, CA, USA, 2000, pp. 83-90.

[93] A. Chojnacki, L. Józwiak: An Effective and Efficient Method for Functional Decomposition of Boolean Functions Based on Information Relationships Measures, Design and Diagnostics of Electronic Circuits and Systems DDECS'2000, Smolenice, Slovakia, April 5-7, 2000.

[92] L. Józwiak, T. Luba and B. Zbierzchowski: Modern Microelectronics - Hardware Face of Information Technology, Telecommunications Review (Przeglad Telekomunikacyjny), No. 1, January 2000 (in Polish), ISSN 1230-3496, SIGMA-NOT Press, pp. 52-59.

[91] L. Józwiak, A. Chojnacki: Functional Decomposition Based on Information Relationship Measures Extremely Effective for Symmetric Functions, 25th EUROMICRO Conference, Milan, Italy, September 8-10,1999, ISBN 0-7695-0321-7, IEEE Computer Society Press, Los Alamitos, CA, USA, 1999, pp. 150-160.

[90] T. Lewis, M. Perkowski and L. Józwiak: An FPGA-Based Rough Set Machine, 25th EUROMICRO Conference, Milan, Italy, September 8-10,1999, ISBN 0-7695-0321-7, IEEE Computer Society Press, Los Alamitos, CA, USA, 1999, pp. 325-334.

[89] S. Chen, A. Postula and L. Józwiak: XOR Storage Scheme Synthesis for Overlapping Data Templates, 25th EUROMICRO Conference, Milan, Italy, September 8-10,1999, ISBN 0-7695-0321-7, IEEE Computer Society Press, Los Alamitos, CA, USA, 1999, pp. 170-177.

[88] M. Rawski, L. Józwiak and T. Luba: Efficient Input Support Selection for Sub-functions in Functional Decomposition Based on Information Relationship Measures, 25th EUROMICRO Conference, Milan, Italy, September 8-10,1999, ISBN 0-7695-0321-7, IEEE Computer Society Press, Los Alamitos, CA, USA, 1999, pp. 94-101.

[87] M. Rawski, L. Józwiak and T. Luba: The Influence of the Number of Values in Sub-functions on the Effectiveness and Efficiency of the Functional Decomposition, 25th EUROMICRO Conference, Milan, Italy, September 8-10,1999, ISBN 0-7695-0321-7, IEEE Computer Society Press, Los Alamitos, CA, USA, 1999, pp. 86-93.

[86] L. Józwiak, A. Slusarczyk and M. Perkowski: Term Trees in Application to an Effective and Efficient ATPG for AND-EXOR and AND-OR circuits , Reed-Müller'99: International Workshop on Applications of the Reed-Müller Expansion in Circuit Design, University of Victoria, Victoria B.C., Canada, August 20-21, 1999.

[85] L. Józwiak: Quality-Driven Design of Application-Specific Systems, Thirteenth International Conference on Systems Engineering - ICSE'99, Las Vegas, Nevada, USA, August 10-12, 1999, INCOSE - International Council on Systems Engineering, pp. EE 95-100.

[84] L. Józwiak and A. Postula: Genetic Engineering versus Natural Evolution: Genetic Algorithms with Deterministic Operators, International Conference on Artificial Intelligence IC-AI'99, Las Vegas, Nevada, USA, June 28-July 1, 1999, ISBN 1-892512-16-5, CSREA Press, 1999, pp. 58-64.

[83] L. Józwiak: Information Relationships and Measures in Application to Logic Design, IEEE International Symposium on Multiple-Valued Logic, Freiburg Im Breisgau, Germany, May 20-22, 1999.

[82] L. Józwiak, N. Ederveen: Genetic Algorithm for Input Support Minimization, Proc. ICCIMA'98 - International Conference on Computational Intelligence and Multimedia Applications, Gippsland, Victoria, Australia, Febr. 9 - 11, 1998; ISBN 981-02-3352-3, World Scientific Publ. Co., Singapore, 1998, pp. 765-77.

[81] M. Perkowski, L. Józwiak, S. Mohamed: New Approach to Learning Noisy Boolean Functions, Proc. ICCIMA'98 - International Conference on Computational Intelligence and Multimedia Applications, Gippsland, Victoria, Australia, Febr. 9 - 11, 1998; ISBN 981-02-3352-3, World Scientific Publ. Co., Singapore, 1998, pp. 693 - 706.

[80] L. Józwiak, M. Perkowski, D. Foote: Massively Parallel Structures of Specialized Re-configurable Cellular Processors for Fast Symbolic Computations, Proc. MPCS'98 - The Third International Conference on Massively Parallel Computing Systems, Colorado Springs, Colorado, USA, April 6-9, 1998, ISBN 0-966-9530-0-2, pp. 55-64.

[79] L. Józwiak: Efficient Logic Synthesis for FPGAs and PLDs with Information Relationships and Measures, IWLS'98 - The IEEE/ACM International Workshop on Logic Synthesis, Tahoe City, California, USA, June 7-10, 1998, pp. 248-254.

[78] L. Józwiak: Analysis and Synthesis of Information Systems with Information Relationships and Measures, RSCTC'98 - International Conference on Rough Sets and Current Trends in Computing, Warsaw, Poland, June 22 - 26, 1998, ISBN 3-540-64655-8, Springer Verlag, Berlin, 1998, pp. 585 - 588.

[77] M. Rawski, L. Józwiak, A. Chojnacki: Application of the Information Measures to Input Support Selection in Functional Decomposition, RSCTC'98 - International Conference on Rough Sets and Current Trends in Computing, Warsaw, Poland, June 22 - 26, 1998, ISBN 3-540-64655-8, Springer Verlag, Berlin, 1998, pp. 573 - 580.

[76] M. Burns, M. Perkowski, L. Józwiak: An Efficient Approach to Decomposition of Multi-Output Boolean Functions with Large Sets of Bound Variables, Proc. EUROMICRO-98 Conference, Vasteras, Sweden, August 25-27, 1998, ISBN 0-8186-8646-4, IEEE Computer Society Press, Los Alamitos, CA, USA, 1998, pp. 16-23.

[75] L.B. Nguyen, M. Perkowski, L. Józwiak: Design of Self-Synchronized Component FSMs for Self-Timed Systems, Proc. EUROMICRO-98 Conference, Vasteras, Sweden, August 25-27, 1998, ISBN 0-8186-8646-4, IEEE Computer Society Press, Los Alamitos, CA, USA, 1998, pp. 253-260.

[74] L. Józwiak, N. Ederveen, A. Postula: Solving Synthesis Problems with Genetic Algorithms, Proc. EUROMICRO-98 Conference, Vasteras, Sweden, August 25-27, 1998, ISBN 0-8186-8646-4, IEEE Computer Society Press, Los Alamitos, CA, USA, 1998, pp. 1-7.

[73] A. Postula, S. Chen, L. Józwiak, D. Abramson: Automated Synthesis of Interleaved Memory Systems for Custom Computing Machines, Proc. EUROMICRO-98 Conference, Vasteras, Sweden, August 25-27, 1998, ISBN 0-8186-8646-4, IEEE Computer Society Press, Los Alamitos, CA, USA, 1998, pp. 115-122.

[72] M. Rawski, L. Józwiak, T. Luba, A. Chojnacki: Efficient Logic Synthesis for FPGAs with Functional Decomposition Based on Information Relationship Measures, Proc. EUROMICRO-98 Conference, Vasteras, Sweden, August 25-27, 1998, ISBN 0-8186-8646-4, IEEE Computer Society Press, Los Alamitos, CA, USA, 1998, pp. 8-15.

[71] L. Józwiak: The Nature of the System Design Problems and The Quality-driven System Design Process, Proc. SCI'98 - World Multiconference on Systemics, Cybernetics and Informatics, Orlando, Florida, july 12-16, 1998, ISBN 980-07-5081-9, International Institute of Informatics and Systemics, Orlando, Florida, USA, 1998, pp. 541-548.

[70] L. Józwiak: Recent Developments and Development Trends in Microelectronics and Information Technology and Their Implications (Invited Paper), Proc. SCI'98 - World Multiconference on Systemics, Cybernetics and Informatics, Orlando, Florida, july 12-16, 1998, ISBN 980-07-5081-9, International Institute of Informatics and Systemics, Orlando, Florida, USA, 1998, pp. 549-556.

[69] L. Józwiak, A. Chojnacki, F. Volf, M. Perkowski: A Bottom-Up Approach to Multiple-Level Logic Synthesis, Proc. of the Second International Workshop on Design and Diagnostics of Electronic Circuits and Systems, Szczyrk, Poland, September 2 - 4, 1998, ISBN 83-908409-6-0, pp. 39-45.

[68] R. Malvi, M. Perkowski, L. Józwiak: Exact Graph Coloring for Functional Decomposition: Do We Need It?, Proc. of the 3rd International Workshop on Boolean Problems, Freiberg, Germany, September 17-18, 1998. ISBN ?, Freiberg Academy of Mining and Technology, Institute of Computer Science, 1998, pp. 1-10.

[67] M. Burns, M. Perkowski, L. Józwiak, S. Grygiel: An Efficient and Effective Approach to Column-Based Input/Output Encoding in Functional Decomposition, Proc. of the 3rd International Workshop on Boolean Problems, Freiberg, Germany, September 17-18, 1998. ISBN ?, Freiberg Academy of Mining and Technology, Institute of Computer Science, 1998, pp. 19-29.

[66] M. Perkowski, L. Józwiak, C. Files: Minimization of Continuous-Input Sum of And-Or-Implicant Expressions for Data Mining Applications, Proc. of the 3rd International Workshop on Boolean Problems, Freiberg, Germany, September 17-18, 1998. ISBN ?, Freiberg Academy of Mining and Technology, Institute of Computer Science, 1998, pp. 125-131.

[65] L. Józwiak, A. Chojnacki: Application of Information Relationship Measures to Logic Synthesis, Proc. CSSP98 - 9th Annual Workshop on Circuits, Systems and Signal Processing, Mierlo, The Netherlands, November 25-27, 1998, ISBN 90-73461-15-4, STW Technology Foundation, Utrecht, 1998 (CD-ROM publication), pp.243-249.

[64] L. Józwiak, A. Chojnacki: Functional Decomposition with Information Relationship Measures, Proc. CSSP98 - 9th Annual Workshop on Circuits, Systems and Signal Processing, Mierlo, The Netherlands, November 25-27, 1998, ISBN 90-73461-15-4, STW Technology Foundation, Utrecht, 1998 (CD-ROM publication), pp.251-257.

[63] L. Józwiak: Information Relationships and Measures: An Analysis Apparatus for Efficient Information System Synthesis, Proc. EUROMICRO-97, 23rd Conference "New Frontiers of Information Technology", Budapest, Hungary, Sept. 1-4, 1997, ISBN 0-8186-8129-2; IEEE Computer Society Press, Los Alamitos, CA, USA, 1997, pp. 13-23.

[62] L. Józwiak: On the Use of Term Trees for Effective and Efficient Test Pattern Generation, Proc. EUROMICRO-97, 23rd Conference "New Frontiers of Information Technology", Budapest, Hungary, Sept. 1-4, 1997, ISBN 0-8186-8129-2; IEEE Computer Society Press, Los Alamitos, CA, USA, 1997, pp. 87-95.

[61] L. Józwiak: The Nature of the System Design Problems and Its Influence on the System Design Process, Design Models and Design Languages, Proc. SLDL, The Workshop on System-Level Design Language, Barga, Italy, 8-10 July 1997; Internet publication http://www.ecsi.org, 1997.

[60] L. Józwiak: Quality-driven Design of Integrated Systems, Proc. IEEE Instrumentation and Measurement Technology Conference, Ottawa, Canada, May 19-21, 1997, ISBN 0-7803-3747-6; IEEE Service Center, Piscataway, NJ, USA, 1997, pp. 84-89.

[59] L. Józwiak, M.A. Perkowski, D. Foote: Reconfigurable FPGA Coprocessor for Fast Computations in Multiple-Valued Logic, Proc. IWLAS-97, International Workshop on Logic and Architecture Synthesis, Grenoble, France, Dec. 16-18, 1997; Institute National Polytechnique de Grenoble, Grenoble, France, 1997, pp. 83-92.

[58] S.A. Ong, L. Józwiak, K. Tiensyrja: Interactive Codesign for Real-Time Embedded Control Systems, Proc. ISIE-97, IEEE International Symposium on Industrial Electronics, Guinaraes, Portugal, July 7-11, 1997, ISBN 0-7803-3334-9; IEEE Press, 1997.

[57] S.A. Ong, L. Józwiak, K. Tiensyrja: Interactive Codesign for Real-Time Embedded Control Systems: Task Graphs Generation from SA/VHDL Models, Proc. EUROMICRO-97, 23rd Conference "New Frontiers of Information Technology", Budapest, Hungary, Sept. 1-4, 1997, ISBN 0-8186-8129-2; IEEE Computer Society Press, Los Alamitos, CA, USA, 1997, pp. 172-181.

[56] M.A. Perkowski, L. Józwiak, R. Drechsler, B. Falkowski: Ordered and Shared, Linearly Independent, Variable-Pair Decision Diagrams, Proc. ICICS-97, First International Conference on Information, Communications and Signal Processing, Session 1C1: Spectral Techniques and Decision Diagrams, Singapore, Sept. 9-12, 1997.

[55] M.A. Perkowski and L. Józwiak: Simultaneous Minimization, Decomposition and Encoding of Nondeterministic State Machines, Proc. CADDD-97, 2nd International Conference on Computer-Aided Design of Discrete Devices, Minsk, Belarus, Nov. 12-14, 1997; Inst. of Engineering Cybernetics of the Nat. Acad. of Science, Minsk, Belarus, 1997, pp. 29-35.

[54] M.A. Perkowski and L. Józwiak: Two-Dimensional Minimization of Nondeterministic State Machines, Proc. CADDD-97, 2nd International Conference on Computer-Aided Design of Discrete Devices, Minsk, Belarus, Nov. 12-14, 1997; Inst. of Engineering Cybernetics of the Nat. Acad. of Science, Minsk, Belarus, 1997, pp. 21-28.

[53] A. Perkowski, L. Józwiak and R. Drechsler: New Hierarchies of AND/EXOR Trees, Decision Diagrams, Lattice Diagrams, Canonical Forms and Regular Layouts, Proc. Reed-Muller-97, 3rd International Workshop on Application of the Reed-Muller Expansion in Circuit Design, Oxford, United Kingdom, Sept. 19-20, 1997; Forschungszentrum Informatik, Karlsruhe, Germany, 1997, pp. 115-132.

[52] M.A. Perkowski, L. Józwiak and R. Drechsler: A Canonical AND/EXOR Form that Includes Both the Generalized Reed-Muller Forms and Kronecker Forms, Proc. Reed-Muller-97, 3rd International Workshop on Application of the Reed-Muller Expansion in Circuit Design, Oxford, United Kingdom, Sept. 19-20, 1997; Forschungszentrum Informatik, Karlsruhe, Germany, 1997, pp. 219-233.

[51] M.A. Perkowski, L. Józwiak and D. Foote: Architecture of a Programmable FPGA Coprocessor for Constructive Induction Approach to Machine Learning and other Discrete Optimization Problems, Reconfigurable Architectures: High Performance by Configware, ISBN 0-9639887-1-9, ed. R.W. Hartenstein, V.K. Prasanna; IT press, Chicago, USA, 1997, pp. 33-40.

[50] M.A. Perkowski, L. Józwiak and S. Mohamed: Fast Minimization of Multi-Output Boolean Functions in Sum-of-Condition-Decoders Structures, Proc. EUROMICRO-97, 23rd Conference "New Frontiers of Information Technology", Budapest, Hungary, Sept. 1-4, 1997, ISBN 0-8186-8129-2; IEEE Computer Society Press, Los Alamitos, CA, USA, 1997, pp. 31-38.

[49] M.A. Perkowski, M. Marek-Sadowska, L. Józwiak, T. Luba, S. Grygiel, M. Nowicka, R. Malvi, Z. Wang, J.S. Zhang: Decomposition of Multiple-Valued Relations, Proc. IEEE International Symposium on Multiple-Valued Logic, Halifax, Nova Scotia, Canada, May 1997, pp. 13-18.

[48] M. Rawski, M. Nowicka, L. Józwiak, T. Luba: Non-Disjoint Decomposition of Boolean Functions an Its Application in FPGA-Oriented Technology Mapping, Proc. EUROMICRO-97, 23rd Conference "New Frontiers of Information Technology", Budapest, Hungary, Sept. 1-4,0 1997, ISBN 0-8186-8129-2; IEEE Computer Society Press, Los Alamitos, CA, USA, 1997, pp. 24-30.

[47] L. Józwiak and P.A. Konieczny: Input Support Minimization for Efficient PLD and FPGA Synthesis, IWLAS'96 - IFIP International Workshop on Logic and Architecture Synthesis, Grenoble, France, Dec. 16-18, 1996, pp. 30-37.

[46] L. Józwiak: Logic Synthesis, EUROMICRO'96 Conference, IEEE Computer Society Press, Prague, Czech Republic, Sept. 02-05, 1996, pp. 257-258.

[45] L. Józwiak and S.A. Ong: Quality-Driven Decision Making Methodology for System-Level Design, EUROMICRO'96 Conference, IEEE Computer Society Press, Prague, Czech Republic, Sept. 02-05, 1996, pp. 08-18.

[44] L. Józwiak: Quality-Driven Design Space Exploration in Electronic System Design, IEEE International Symposium on Industrial Electronics, Warsaw, Poland, June 17-20, 1996, pp. 1049-1054.

[43] L. Józwiak: Quality-Driven Design of Electronic Systems, 3rd International Workshop on Mixed Design of Integrated Circuits and Systems, Lodz, Poland, May 30-June 1, 1996, pp. 13-24.

[42] L. Józwiak: Modern Concepts of Quality and Their Relationship to Design Reuse and Model Libraries, in the book series Current Issues in Electronic Modelling, Chapter 8, vol. 5, Kluwer Academic Publishers, Dordrecht, 1995.

[41] L. Józwiak: Decomposition in VLSI Design, VLSI Design: An International Journal of Custom Chip Design Simulation and Testing, vol.3, No 3-4, 1995.

[40] L. Józwiak: General Decomposition and Its Use in Digital Circuit Synthesis, VLSI Design: An International Journal of Custom Chip Design Simulation and Testing, vol.3, No 3-4, 1995.

[39] F.A.M. Volf, L. Józwiak, M.P.J. Stevens: Division-Based versus General Decomposition-Based Multiple-Level Logic Synthesis, VLSI Design: An International Journal of Custom Chip Design Simulation and Testing, vol.3, No 3-4, 1995.

[38] L. Józwiak: Modern Concepts of Quality and Their Relations to Model Libraries, IFIP/ESPRIT Workshop on Libraries, Component Modelling, and Quality Assurance, Nantes, France, 26-27 Apr., 1995.

[37] L. Józwiak, A. Ong: Quality-Driven Decision Making in Digital System Design, XIIth International Conference on Multiple Criteria Decision Making MCDM'95, Hagen, Germany, 19-23 June, 1995.

[36] L. Józwiak, F.A.M. Volf: Efficient Decomposition of Assigned Sequential Machines and Boolean Functions for PLD Implementations, IEEE International Conference on Electronic Technology Directions, Adelaide, Australia, 23-25 May, 1995.

[35] L. Józwiak: Quality-Driven Design of Hardware/Software Systems, IEEE/IFAC International Conference on Recent Advances in Mechatronics ICRAM'95, Istanbul, Turkey, 14-16 August, 1995.

[34] L. Józwiak: An Efficient Verification Method for Application in Transformational Design, EUROMICRO'95, Como, Italy, 4-7 Sept., 1995.

[33] F.A.M. Volf, L. Józwiak: Decompositional Logic Synthesis Approach for Look Up Table Based FPGAs, 8th IEEE International ASIC Conference, Austin, Texas, 18-22 Sept., 1995.

[32] L. Józwiak, P.A. Konieczny: Heuristic Algorithms for Minimal Input Support Problems, International Workshop on Design Methodologies for Microelectronics, Smolenice Castle, Slovakia, 11-13 Sept., 1995.

[31] P.A. Konieczny, L. Józwiak: Minimal Input Support Problem and Algorithms to Solve It, TUE Research Report, EUT Report 95-E-289, Eindhoven, 1995.

[30] L.Józwiak, A.Postula: Automatic Hardware Synthesis, materials of the One-day Tutorial accompanying the IEEE International Conference on Electronic Technology Directions, Adelaide, Australia, 25 May, 1995.

[29] L. Józwiak, S.A. Ong: Quality-Driven Decision Making in Digital Systems Design, 40th European Conference on Multicriteria Aid for Decisions, Université Paris Dauphine, Paris, France, 06 Oct., 1994.

[28] L. Józwiak: Decompositional Logic Synthesis: Correctness Aspects, APCHDLSA - 93: Asian Pacific Conference on Hardware Description Languages, Standarts and Applications, Brisbane, Australia, 6 - 9 Dec. 1993.

[27] L. Józwiak: General Decompositions in Logic Synthesis, International Workshop on Design Methodologies for Microelectronics and Signal Processing, Gliwice - Kraków, Poland, 20 - 23 Oct., 1993.

[26] L. Józwiak, H.P.J. Mijland: On the Use of OR-BDDs for Test Generation, Microprocessing and Microprogramming, vol. 35, No 1-5, 1992.

[25] L. Józwiak, A.P.H. van Dijk: A Method for General Simultaneous Full Decomposition of Sequential Machines: Algorithms and Implementation, EUT Research Reports, Eindhoven University of Technology, June 1992.

[24] L. Józwiak, H.P.J. Mijland: OR-BDDs: Modelling Logical Structures for Test Generation, International Workshop on New Directions for Testing, Montreal, Canada, May 21-22, 1992.

[23] L. Józwiak, F. Volf: An Efficient Method for Decomposition of Multiple-Output Boolean Functions and Assigned Sequential Machines, EDAC - The European Conference on Design Automation, Brussels, IEEE Computer Society Press, pp. 114-122, 16-19 March, 1992.

[22] L. Józwiak: An Efficient Heuristic Method for State Assignment of Large Sequential Machines, Journal of Circuits, Systems and Computers, vol. 2, no.1, 1992.

[21] L. Józwiak, F. Volf and J. Kolsteren: Controller Synthesis from VHDL Description: Implementing Design for Quality, EURO-VHDL'91, Stockholm, Sweden, September 11-13, 1991.

[20] L. Józwiak, J.C. Kolsteren: An Efficient Method for the Sequential Decomposition of Sequential Machines, Microprocessing and Microprogramming, vol. 32, pp. 657-664, 1991.

[19] L. Józwiak: Simultaneous Decomposition of Sequential Machines, Microprocessing and Microprogramming, vol. 30, pp. 305-312, 1990.

[18] L. Józwiak, T. Spassova-Kwaaitaal: Decompositional State Assignment with Reuse of Standard Design, EUT Research Reports, EUT 90-E-247, 1990.

[17] L. Józwiak: Automatic Synthesis of Complex Digital Circuits, KIVI Symposium: CAD in Electrical Engineering, Eindhoven, The Netherlands, 26 Jan., 1990.

[16] L. Józwiak: Efficient Suboptimal State Assignment for Large Sequential Machines, EDAC-European Design Automation Conference, Glasgow, Scotland, March 12-15, 1990, IEEE Computer-Society Press, pp. 536 - 541.

[15] L. Józwiak, F. Vankan: Bit Full Decomposition of Sequential Machines: Algorithms and Results, Proceedings of the Canadian Conference on Electrical and Computer Engineering, Montreal, Sept. 1989, IEEE Computer Society Press.

[14] L. Józwiak: The Bit Full Decomposition of Sequential Machines, EUT Research Reports, EUT-89E223, Eindhoven University of Technology, The Netherlands, 1989.

[13] L. Józwiak: The Full Decomposition of Sequential Machines with the Separate Realisation of Next State and Output Functions, EUT Research Reports, EUT-89E222, Eindhoven University of Technology, The Netherlands, 1989.

[12] L. Józwiak: The Full Decomposition of Sequential Machines with the Output Behaviour Realisation, EUT Research Reports, EUT-88E199, Eindhoven University of Technology, The Netherlands, 1988.

[11] L. Józwiak: The Full Decomposition of Sequential Machines with the State and Output Behaviour Realisation, EUT Research Report, EUT-88E188, Eindhoven University of Technology, The Netherlands, 1988.

[10] L. Józwiak: Minimal Realization of Sequential Machines: the Method of Maximal Adjacencies, EUT-Report 88-E-209, Eindhoven University of Technology, November 1988.

[9] L. Józwiak: Detection of Faults in Digital System Functioning by Application of Quotient Codes, Archives of Automatics and Telemechanics, Polish Academy of Science, 1985.

[8] L. Józwiak: Fault-tolerance in Computer Networks for Control and Supervision of Industrial Processes, Computer Science and Computer Techniques, Research Institute of Computers, Warsaw, 1984.

[7] L. Józwiak: Fault-tolelerance in Computer Networks for Control and Supervisory Applications, 3rd International Conference on Reliability and Exploitation of Computer Systems, Ksiaó Castle, Poland, 1984.

[6] L. Józwiak, J. Klimowicz: The Concept of a Computer System for Control of Tractor Assembly, Computer Science and Computer Techniques, Research Institute of Computers, Warsaw, 1983.

[5] L. Józwiak: On Application of Cyclic Codes for Detection of Faults in Computer System Functioning, 5th International Conference on Fault Tolerant Systems and Diagnostics, Katowice, Poland, 1983.

[4] L. Józwiak: The Analysis of Hardware Fault Tolerance Methods, doctor dissertation, Warsaw University of Technology, Warsaw, 1981.

[3] L. Józwiak: On the Realization of a Rollback Technique, Archives of Automatics and Telemechanics, Polish Science Academy, Warsaw, 1980.

[2] L. Józwiak: Detection of Faults with a Limited Use of Hardware Redundancy, 2nd International Conference on Fault Tolerant Systems and Diagnostics, Brno, Czechoslovakia, 1979.

[1] L. Józwiak: Correction of Syntax Errors for ADL Language, 7th National Conference on Automatic Control, Rzeszów, Poland, 1977.